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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  3/2019 - 7

Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor

KIRCHHOFF, M. See more information about KIRCHHOFF, M. on SCOPUS See more information about KIRCHHOFF, M. on IEEExplore See more information about KIRCHHOFF, M. on Web of Science, WAGNER, L. See more information about  WAGNER, L. on SCOPUS See more information about  WAGNER, L. on SCOPUS See more information about WAGNER, L. on Web of Science, FENGLER, W. See more information about FENGLER, W. on SCOPUS See more information about FENGLER, W. on SCOPUS See more information about FENGLER, W. on Web of Science
 
Click to see author's profile in See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (366 KB) | Citation | Downloads: 172 | Views: 397

Author keywords
dynamic compiler, optimization methods, processor scheduling, scheduling algorithms, vector processor

References keywords
processor(10), systems(8), design(7), core(7), scheduling(6), fengler(6), embedded(5), compiler(5), time(4), system(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2019-08-31
Volume 19, Issue 3, Year 2019, On page(s): 57 - 68
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.03007
Web of Science Accession Number: 000486574100007
SCOPUS ID: 85072200729

Abstract
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This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floating-point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem.


References | Cited By  «-- Click to see who has cited this paper

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[CrossRef] [Web of Science Times Cited 10] [SCOPUS Times Cited 12]




References Weight

Web of Science® Citations for all references: 281 TCR
SCOPUS® Citations for all references: 656 TCR

Web of Science® Average Citations per reference: 9 ACR
SCOPUS® Average Citations per reference: 21 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2020-02-25 00:15 in 141 seconds.




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