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Design, FPGA-based Implementation and Performance of a Pseudo Random Number Generator of Chaotic SequencesDRIDI, F. , EL ASSAD, S. , EL HADJ YOUSSEF, W. , MACHHOUT, M. , SAMHAT, A. E. |
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Author keywords
chaotic, field programmable gate arrays, hardware, performance evaluation, statistical analysis
References keywords
chaotic(10), systems(9), random(8), generation(6), chaos(6), applications(6), implementation(5), design(5), circuits(5), theory(4)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2021-05-31
Volume 21, Issue 2, Year 2021, On page(s): 41 - 48
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2021.02005
Web of Science Accession Number: 000657126200005
SCOPUS ID: 85107700679
Abstract
Pseudo-Random Number Generator of Chaotic Sequences (PRNG-CS) has caught the attention in various security applications, especially for stream and block ciphering, steganography, and digital watermarking algorithms. Indeed, in all chaos-based cryptographic systems, the chaotic generator plays a vital role and exhibits appropriate cryptographic properties. Due to the technological outbreak, as well as the rapid growth of the Internet of Things (IoT) technology and their various use cases, PRNGs-CS software implementation remains an open issue to meet its service requirements. The hardware implementation is one of the most flagship technology used to implement PRNGs-CS with the aim is to provide high-performance requirements for such application security. Therefore, in this work, we propose a new PRNGs-SC-based architecture. The latter consists of three discrete chaotic maps weakly coupled, as well as, the Piecewise Linear Chaotic Map (PWLCM), the Skew Tent, and the Logistic map. The chaotic system is designed on Xilinx Spartan-6 FPGA-board, using Very High-Speed Integrated Circuit Hardware Description Language (VHDL). Simulation results, performed over the ISE Design Suite environment, prove the effectiveness of our proposed architecture in terms of robustness against statistical attacks, throughput, and hardware cost. So, based on its architecture and the simulation results the proposed PRNG-SC can be used in cryptographic applications. |
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[1] FPGA Implementation of a Chaotic Pseudo-random Numbers Generator, Abderrahim, N. W., Benmansour, F. Z., Seddiki, O., SN Computer Science, ISSN 2661-8907, Issue 4, Volume 4, 2023.
Digital Object Identifier: 10.1007/s42979-023-01837-7 [CrossRef]
[2] A Review on Applications of Chaotic Maps in Pseudo-Random Number Generators and Encryption, Naik, Rasika B., Singh, Udayprakash, Annals of Data Science, ISSN 2198-5804, Issue 1, Volume 11, 2024.
Digital Object Identifier: 10.1007/s40745-021-00364-7 [CrossRef]
[3] Enhanced Chaotic Pseudorandom Number Generation Using Multiple Bernoulli Maps with Field Programmable Gate Array Optimizations, Palacios-Luengas, Leonardo, Medina-Ramírez, Reyna Carolina, Marcelín-Jiménez, Ricardo, Rodriguez-Colina, Enrique, Castillo-Soria, Francisco R., Vázquez-Medina, Rubén, Information, ISSN 2078-2489, Issue 11, Volume 15, 2024.
Digital Object Identifier: 10.3390/info15110667 [CrossRef]
[4] Chaotic Maps in Cryptography, Saeed, Hala, El sobky, Wageda I., Diab, Tamer O., Elsisi, M. A., 2024 International Telecommunications Conference (ITC-Egypt), ISBN 979-8-3503-5140-8, 2024.
Digital Object Identifier: 10.1109/ITC-Egypt61547.2024.10620474 [CrossRef]
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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