Click to open the HelpDesk interface
AECE - Front page banner

Menu:


FACTS & FIGURES

JCR Impact Factor: 0.700
JCR 5-Year IF: 0.700
SCOPUS CiteScore: 1.8
Issues per year: 4
Current issue: Nov 2024
Next issue: Feb 2025
Avg review time: 54 days
Avg accept to publ: 60 days
APC: 300 EUR


PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


TRAFFIC STATS

3,043,247 unique visits
1,184,092 downloads
Since November 1, 2009



Robots online now
bingbot
AcademicBotRTU


SCOPUS CiteScore

SCOPUS CiteScore


SJR SCImago RANK

SCImago Journal & Country Rank




TEXT LINKS

Anycast DNS Hosting
MOST RECENT ISSUES

 Volume 24 (2024)
 
     »   Issue 4 / 2024
 
     »   Issue 3 / 2024
 
     »   Issue 2 / 2024
 
     »   Issue 1 / 2024
 
 
 Volume 23 (2023)
 
     »   Issue 4 / 2023
 
     »   Issue 3 / 2023
 
     »   Issue 2 / 2023
 
     »   Issue 1 / 2023
 
 
 Volume 22 (2022)
 
     »   Issue 4 / 2022
 
     »   Issue 3 / 2022
 
     »   Issue 2 / 2022
 
     »   Issue 1 / 2022
 
 
 Volume 21 (2021)
 
     »   Issue 4 / 2021
 
     »   Issue 3 / 2021
 
     »   Issue 2 / 2021
 
     »   Issue 1 / 2021
 
 
  View all issues  


FEATURED ARTICLE

A Proposed Signal Reconstruction Algorithm over Bandlimited Channels for Wireless Communications, ASHOUR, A., KHALAF, A., HUSSEIN, A., HAMED, H., RAMADAN, A.
Issue 1/2023

AbstractPlus


SAMPLE ARTICLES

Quality of Experience Assessment for HTTP Based Adaptive Video Streaming, ARSENOVIC, M., RIMAC-DRLJE, S.
Issue 1/2023

AbstractPlus

An Enhanced Time-dependent Traffic Flow Prediction in Smart Cities, SHOUAIB, M., METWALLY, K., BADRAN, K.
Issue 3/2023

AbstractPlus

Performance Analysis of Ryu-POX Controller in Different Tree-Based SDN Topologies, CABARKAPA, D., RANCIC, D.
Issue 3/2021

AbstractPlus

A Novel Approach for Knowledge Discovery from AIS Data: An Application for Transit Marine Traffic in the Sea of Marmara, DOGAN, Y., KART, O., KUNDAKCI, B., NAS, S.
Issue 3/2021

AbstractPlus

Control Based on Linear Matrix Inequalities for Power Converters of an Islanded AC Microgrid, TERAN, R. A. J., PEREZ, J., BERISTAIN, J. A., VALLE, O. A.
Issue 3/2022

AbstractPlus

Deep Learning Based DNS Tunneling Detection and Blocking System, ALTUNCU, M. A., GULAGIZ, F. K., OZCAN, H., BAYIR, O. F., GEZGIN, A., NIYAZOV, A., CAVUSLU, M. A., SAHIN, S.
Issue 3/2021

AbstractPlus




LATEST NEWS

2024-Jun-20
Clarivate Analytics published the InCites Journal Citations Report for 2023. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.700 (0.700 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.600.

2023-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2022. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.800 (0.700 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 1.000.

2023-Jun-05
SCOPUS published the CiteScore for 2022, computed by using an improved methodology, counting the citations received in 2019-2022 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2022 is 2.0. For "General Computer Science" we rank #134/233 and for "Electrical and Electronic Engineering" we rank #478/738.

2022-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2021. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.825 (0.722 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 0.752.

2022-Jun-16
SCOPUS published the CiteScore for 2021, computed by using an improved methodology, counting the citations received in 2018-2021 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2021 is 2.5, the same as for 2020 but better than all our previous results.

Read More »


    
 

  2/2021 - 5

Design, FPGA-based Implementation and Performance of a Pseudo Random Number Generator of Chaotic Sequences

DRIDI, F. See more information about DRIDI, F. on SCOPUS See more information about DRIDI, F. on IEEExplore See more information about DRIDI, F. on Web of Science, EL ASSAD, S. See more information about  EL ASSAD, S. on SCOPUS See more information about  EL ASSAD, S. on SCOPUS See more information about EL ASSAD, S. on Web of Science, EL HADJ YOUSSEF, W. See more information about  EL HADJ YOUSSEF, W. on SCOPUS See more information about  EL HADJ YOUSSEF, W. on SCOPUS See more information about EL HADJ YOUSSEF, W. on Web of Science, MACHHOUT, M. See more information about  MACHHOUT, M. on SCOPUS See more information about  MACHHOUT, M. on SCOPUS See more information about MACHHOUT, M. on Web of Science, SAMHAT, A. E. See more information about SAMHAT, A. E. on SCOPUS See more information about SAMHAT, A. E. on SCOPUS See more information about SAMHAT, A. E. on Web of Science
 
Extra paper information in View the paper record and citations in Google Scholar View the paper record and similar papers in Microsoft Bing View the paper record and similar papers in Semantic Scholar the AI-powered research tool
Click to see author's profile in See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (1,453 KB) | Citation | Downloads: 1,037 | Views: 3,344

Author keywords
chaotic, field programmable gate arrays, hardware, performance evaluation, statistical analysis

References keywords
chaotic(10), systems(9), random(8), generation(6), chaos(6), applications(6), implementation(5), design(5), circuits(5), theory(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2021-05-31
Volume 21, Issue 2, Year 2021, On page(s): 41 - 48
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2021.02005
Web of Science Accession Number: 000657126200005
SCOPUS ID: 85107700679

Abstract
Quick view
Full text preview
Pseudo-Random Number Generator of Chaotic Sequences (PRNG-CS) has caught the attention in various security applications, especially for stream and block ciphering, steganography, and digital watermarking algorithms. Indeed, in all chaos-based cryptographic systems, the chaotic generator plays a vital role and exhibits appropriate cryptographic properties. Due to the technological outbreak, as well as the rapid growth of the Internet of Things (IoT) technology and their various use cases, PRNGs-CS software implementation remains an open issue to meet its service requirements. The hardware implementation is one of the most flagship technology used to implement PRNGs-CS with the aim is to provide high-performance requirements for such application security. Therefore, in this work, we propose a new PRNGs-SC-based architecture. The latter consists of three discrete chaotic maps weakly coupled, as well as, the Piecewise Linear Chaotic Map (PWLCM), the Skew Tent, and the Logistic map. The chaotic system is designed on Xilinx Spartan-6 FPGA-board, using Very High-Speed Integrated Circuit Hardware Description Language (VHDL). Simulation results, performed over the ISE Design Suite environment, prove the effectiveness of our proposed architecture in terms of robustness against statistical attacks, throughput, and hardware cost. So, based on its architecture and the simulation results the proposed PRNG-SC can be used in cryptographic applications.


References | Cited By

Cited-By Clarivate Web of Science

Web of Science® Times Cited: 1 [View]
View record in Web of Science® [View]
View Related Records® [View]

Updated today


Cited-By SCOPUS

SCOPUS® Times Cited: 3
View record in SCOPUS®
[Free preview]
View citations in SCOPUS® [Free preview]

Updated today

Cited-By CrossRef

[1] FPGA Implementation of a Chaotic Pseudo-random Numbers Generator, Abderrahim, N. W., Benmansour, F. Z., Seddiki, O., SN Computer Science, ISSN 2661-8907, Issue 4, Volume 4, 2023.
Digital Object Identifier: 10.1007/s42979-023-01837-7
[CrossRef]

[2] A Review on Applications of Chaotic Maps in Pseudo-Random Number Generators and Encryption, Naik, Rasika B., Singh, Udayprakash, Annals of Data Science, ISSN 2198-5804, Issue 1, Volume 11, 2024.
Digital Object Identifier: 10.1007/s40745-021-00364-7
[CrossRef]

[3] Enhanced Chaotic Pseudorandom Number Generation Using Multiple Bernoulli Maps with Field Programmable Gate Array Optimizations, Palacios-Luengas, Leonardo, Medina-Ramírez, Reyna Carolina, Marcelín-Jiménez, Ricardo, Rodriguez-Colina, Enrique, Castillo-Soria, Francisco R., Vázquez-Medina, Rubén, Information, ISSN 2078-2489, Issue 11, Volume 15, 2024.
Digital Object Identifier: 10.3390/info15110667
[CrossRef]

[4] Chaotic Maps in Cryptography, Saeed, Hala, El sobky, Wageda I., Diab, Tamer O., Elsisi, M. A., 2024 International Telecommunications Conference (ITC-Egypt), ISBN 979-8-3503-5140-8, 2024.
Digital Object Identifier: 10.1109/ITC-Egypt61547.2024.10620474
[CrossRef]

Updated today

Disclaimer: All information displayed above was retrieved by using remote connections to respective databases. For the best user experience, we update all data by using background processes, and use caches in order to reduce the load on the servers we retrieve the information from. As we have no control on the availability of the database servers and sometimes the Internet connectivity may be affected, we do not guarantee the information is correct or complete. For the most accurate data, please always consult the database sites directly. Some external links require authentication or an institutional subscription.

Web of Science® is a registered trademark of Clarivate Analytics, Scopus® is a registered trademark of Elsevier B.V., other product names, company names, brand names, trademarks and logos are the property of their respective owners.


Copyright ©2001-2024
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.

Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.

Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.




Website loading speed and performance optimization powered by: 


DNS Made Easy