|3/2014 - 16|
Embedded Processor Oriented Compiler InfrastructureDJUKIC, M. , POPOVIC, M. , CETIC, N. , POVAZAN, I.
|Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science|
|Download PDF (1,079 KB) | Citation | Downloads: 352 | Views: 2,629|
digital signal processors, embedded software, fixed-point arithmetic, software tools
embedded(12), systems(10), compiler(10), code(10), optimization(7), design(7), compilers(6), processors(5), generation(5), sigplan(4)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2014-08-31
Volume 14, Issue 3, Year 2014, On page(s): 123 - 130
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.03016
Web of Science Accession Number: 000340869800016
SCOPUS ID: 84907337455
In the recent years, research of special compiler techniques and algorithms for embedded processors broaden the knowledge of how to achieve better compiler performance in irregular processor architectures. However, industrial strength compilers, besides ability to generate efficient code, must also be robust, understandable, maintainable, and extensible. This raises the need for compiler infrastructure that provides means for convenient implementation of embedded processor oriented compiler techniques. Cirrus Logic Coyote 32 DSP is an example that shows how traditional compiler infrastructure is not able to cope with the problem. That is why the new compiler infrastructure was developed for this processor, based on research. in the field of embedded system software tools and experience in development of industrial strength compilers. The new infrastructure is described in this paper. Compiler generated code quality is compared with code generated by the previous compiler for the same processor architecture.
Web of Science® Times Cited: 1 [View]
View record in Web of Science® [View]
View Related Records® [View]
SCOPUS® Times Cited: 1
View record in SCOPUS® [Free preview]
View citations in SCOPUS® [Free preview]
 An Automatic Instruction-Level Parallelization of Machine Code, MARINKOVIC, V., POPOVIC, M., DJUKIC, M., Advances in Electrical and Computer Engineering, ISSN 1582-7445, Issue 1, Volume 18, 2018.
Digital Object Identifier: 10.4316/AECE.2018.01004 [CrossRef] [Full text]
Disclaimer: All information displayed above was retrieved by using remote connections to respective databases. For the best user experience, we update all data by using background processes, and use caches in order to reduce the load on the servers we retrieve the information from. As we have no control on the availability of the database servers and sometimes the Internet connectivity may be affected, we do not guarantee the information is correct or complete. For the most accurate data, please always consult the database sites directly. Some external links require authentication or an institutional subscription.
Web of Science® is a registered trademark of Clarivate Analytics, Scopus® is a registered trademark of Elsevier B.V., other product names, company names, brand names, trademarks and logos are the property of their respective owners.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.