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JCR Impact Factor: 0.595
JCR 5-Year IF: 0.661
Issues per year: 4
Current issue: Nov 2017
Next issue: Feb 2018
Avg review time: 105 days


PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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LATEST NEWS

2017-Jun-14
Thomson Reuters published the Journal Citations Report for 2016. The JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.595, and the JCR 5-Year Impact Factor is 0.661.

2017-Apr-04
We have the confirmation Advances in Electrical and Computer Engineering will be included in the EBSCO database.

2017-Feb-16
With new technologies, such as mobile communications, internet of things, and wide applications of social media, organizations generate a huge volume of data, much faster than several years ago. Big data, characterized by high volume, diversity and velocity, increasingly drives decision making and is changing the landscape of business intelligence, from governments to private organizations, from communities to individuals. Big data analytics that discover insights from evidences has a high demand for computing efficiency, knowledge discovery, problem solving, and event prediction. We dedicate a special section of Issue 4/2017 to Big Data. Prospective authors are asked to make the submissions for this section no later than the 31st of May 2017, placing "BigData - " before the paper title in OpenConf.

2017-Jan-30
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2016-Dec-17
IoT is a new emerging technology domain which will be used to connect all objects through the Internet for remote sensing and control. IoT uses a combination of WSN (Wireless Sensor Network), M2M (Machine to Machine), robotics, wireless networking, Internet technologies, and Smart Devices. We dedicate a special section of Issue 2/2017 to IoT. Prospective authors are asked to make the submissions for this section no later than the 31st of March 2017, placing "IoT - " before the paper title in OpenConf.

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  3/2014 - 16

Embedded Processor Oriented Compiler Infrastructure

DJUKIC, M. See more information about DJUKIC, M. on SCOPUS See more information about DJUKIC, M. on IEEExplore See more information about DJUKIC, M. on Web of Science, POPOVIC, M. See more information about  POPOVIC, M. on SCOPUS See more information about  POPOVIC, M. on SCOPUS See more information about POPOVIC, M. on Web of Science, CETIC, N. See more information about  CETIC, N. on SCOPUS See more information about  CETIC, N. on SCOPUS See more information about CETIC, N. on Web of Science, POVAZAN, I. See more information about POVAZAN, I. on SCOPUS See more information about POVAZAN, I. on SCOPUS See more information about POVAZAN, I. on Web of Science
 
Click to see author's profile on See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (1,079 KB) | Citation | Downloads: 279 | Views: 1,791

Author keywords
digital signal processors, embedded software, fixed-point arithmetic, software tools

References keywords
embedded(12), systems(10), compiler(10), code(10), optimization(7), design(7), compilers(6), processors(5), generation(5), sigplan(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2014-08-31
Volume 14, Issue 3, Year 2014, On page(s): 123 - 130
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.03016
Web of Science Accession Number: 000340869800016
SCOPUS ID: 84907337455

Abstract
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In the recent years, research of special compiler techniques and algorithms for embedded processors broaden the knowledge of how to achieve better compiler performance in irregular processor architectures. However, industrial strength compilers, besides ability to generate efficient code, must also be robust, understandable, maintainable, and extensible. This raises the need for compiler infrastructure that provides means for convenient implementation of embedded processor oriented compiler techniques. Cirrus Logic Coyote 32 DSP is an example that shows how traditional compiler infrastructure is not able to cope with the problem. That is why the new compiler infrastructure was developed for this processor, based on research. in the field of embedded system software tools and experience in development of industrial strength compilers. The new infrastructure is described in this paper. Compiler generated code quality is compared with code generated by the previous compiler for the same processor architecture.


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Copyright ©2001-2017
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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