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Stefan cel Mare
University of Suceava
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Print ISSN: 1582-7445
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WorldCat: 643243560
doi: 10.4316/AECE


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  1/2019 - 8

Design Options for Current Limit and Power Limit Circuit Protections for LDOs

PLESA, C.-S. See more information about PLESA, C.-S. on SCOPUS See more information about PLESA, C.-S. on IEEExplore See more information about PLESA, C.-S. on Web of Science, DIMITRIU, B. See more information about  DIMITRIU, B. on SCOPUS See more information about  DIMITRIU, B. on SCOPUS See more information about DIMITRIU, B. on Web of Science, NEAG, M. See more information about NEAG, M. on SCOPUS See more information about NEAG, M. on SCOPUS See more information about NEAG, M. on Web of Science
 
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Download PDF pdficon (1,394 KB) | Citation | Downloads: 3,657 | Views: 4,151

Author keywords
current limiters, power dissipation, power system protection, short-circuit currents, thermal analysis

References keywords
current(14), protection(10), circuit(8), voltage(6), regulator(6), temperature(5), limit(5), regulators(4), high(4), circuits(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2019-02-28
Volume 19, Issue 1, Year 2019, On page(s): 57 - 62
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.01008
Web of Science Accession Number: 000459986900008
SCOPUS ID: 85064055060

Abstract
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Full text preview
This paper presents novel circuitry for protection of the power transistor in LDOs with adjustable output voltage implemented in BJT technologies. First, an improvement is proposed to a current limit circuit reported previously, that significantly reduces the variation of the value the output current is limited to, caused by setting the output voltage to different values. Next, two circuits for ensuring that the power transistor operates within its safe operating area are introduced; they are based on the proposed current limit circuit, but its activation point is no longer proportional to the output current but to the sum of the output current and a current proportional to the voltage drop across the power transistor. Finally, a circuit that monitors and limits the power dissipated is described; it also employs the proposed current limit circuit but this time the activation point is proportional to the product of the output current and the voltage drop across the power transistor. Three LDOs that employ the three types of protections proposed here are then compared, considering the power dissipated by the power transistor and the resulting maximum die temperature.


References | Cited By  «-- Click to see who has cited this paper

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[CrossRef] [Web of Science Times Cited 609] [SCOPUS Times Cited 735]


[2] I. Filip, O. Prostean, C. Vasar, I. Szeidert, "An improved structure of an adaptive excitation control system operating under short-circuit," Advances in Electrical and Computer Engineering, vol.16, no.2, pp.43-50, 2016,
[CrossRef] [Full Text] [Web of Science Times Cited 6] [SCOPUS Times Cited 9]


[3] O. Garcia, J.-C. Hernandez, F. Jurado, "Guidelines for protection against overcurrent in photovoltaic generators," Advances in Electrical and Computer Engineering, vol.12, no.4, pp.63-70, 2012,
[CrossRef] [Full Text] [Web of Science Times Cited 23] [SCOPUS Times Cited 27]


[4] C.-S. Plesa, M. Neag, L. Radoias, "Design options for thermal shutdown circuitry with hysteresis width independent on the activation temperature," Advances in Electrical and Computer Engineering, vol.17, no.1, pp.69-74, 2017,
[CrossRef] [Full Text] [Web of Science Times Cited 4] [SCOPUS Times Cited 6]


[5] C.-S. Plesa, M. Neag, C. Boianceanu, A. Negoita, "Design methodology for over-temperature and over-current protection of an LDO voltage regulator by using electro-thermal simulations", Vol. 79, pp. 509-516, 2017,
[CrossRef] [Web of Science Times Cited 2] [SCOPUS Times Cited 2]


[6] J. A. De Lima, W. A. Pimenta, "A current limiter for LDO regulators with internal compensation for process and temperature variation", IEEE International Symposium on Circuits and Systems, pp. 2238-2241, May 2008,
[CrossRef] [SCOPUS Times Cited 10]


[7] V. Lerner, D. Pollak, "Current limit circuit architecture for low drop-out voltage regulators", US 20130293986, November 2013.

[8] I. Pappas, V. Kalenteridis, S. Siskos, S. Vlassis, „A complete over-current/short-circuit protection system for LDOs", 20th International Conf. on VLSI and System-on-Chip, 2012 (VLSI-SoC), IEEE/IFIP, pp. 303-306, October 2012,
[CrossRef] [SCOPUS Times Cited 2]


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[CrossRef]


[10] V. A. Ryzhkov, M. S. Karpovich, I. K. Surin and V. Y. Vasilyev, "High-voltage LDO with output current fold-back protection in 250 nm BCD technology," 2016 17th International Conf. of Young Specialists on Micro/Nanotechnologies and Electron Devices (EDM), Erlagol, 2016, pp. 549-554,
[CrossRef] [SCOPUS Times Cited 6]


[11] Z. Zhou, J. Cao, Y. Shi and B. Zhang, "A high-precision voltage regulator with dynamic load technique and overcurrent protection," 2017 IEEE 12th International Conf. on ASIC (ASICON), Guiyang, 2017, pp. 932-935,
[CrossRef] [SCOPUS Times Cited 2]


[12] J. Guo and K. N. Leung, "A fold-back current-limit circuit with load-insensitive quiescent current for CMOS low dropout regulator," 2009 IEEE International Symposium on Circuits and Systems, Taipei, 2009, pp. 2417-2420,
[CrossRef] [Web of Science Times Cited 8] [SCOPUS Times Cited 14]


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[CrossRef] [SCOPUS Times Cited 11]


[14] TLV717P, "Low-dropout regulator with foldback current limit for portable devices", Datasheet Texas Instruments, Oct. 2011, pp. 7-12.

[15] A.-G. Bajenaru, C. Boianceanu, G. Brezeanu, "Investigation of electrothermal behaviour of a linear voltage regulator and its protection circuits by simulator coupling," Semiconductor Conference (CAS), 2013 International, vol.2, no., pp.237,240, 14-16, Oct. 2013,
[CrossRef] [SCOPUS Times Cited 8]


[16] S. D. Carper, "Temperature calibrated over-current protection circuit for linear voltage regulators", US 6867573 B1, November 2003

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[18] P. L. Hower and S. Pendharkar, "Short and long-term safe operating area considerations in LDMOS transistors," 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual., 2005, pp. 545-550,
[CrossRef] [Web of Science Times Cited 30]


[19] C.-S. Plesa, C. Raducan, M. Neag, B. Dimitriu, "Novel current limit circuitry for LDOs," IEEE Eurocon 17th International Conference, 2017,
[CrossRef] [SCOPUS Times Cited 6]


[20] A.-G. Bajenaru, PhD Thesis, pp 28-31, Bucharest, pp 28-31, 2012.

[21] I. Iliuta, A. Danchiv, "Power limitation protection function in integrated low side switches," CAS 2013 Sinaia, 2013, pp. 229-232,
[CrossRef] [SCOPUS Times Cited 2]


[22] M. Hagen, B. Hughes, K. Kopp, J. Pierce, "Power-limit protection circuit with an effuse element", US 20180069394, March 2018.

[23] M. Pfost, C. Boianceanu, H. Lohmeyer, M. Stecher, „Electrothermal simulation of self-heating in DMOS transistors up to thermal runaway", IEEE Trans on Electron Devices, vol. 60, 2013, pp 699-707,
[CrossRef] [Web of Science Times Cited 67] [SCOPUS Times Cited 75]




References Weight

Web of Science® Citations for all references: 749 TCR
SCOPUS® Citations for all references: 915 TCR

Web of Science® Average Citations per reference: 31 ACR
SCOPUS® Average Citations per reference: 38 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2024-11-07 18:19 in 118 seconds.




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Stefan cel Mare University of Suceava, Romania


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