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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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  1/2016 - 10

Highly Efficient, Zero-Skew, Integrated Clock Distribution Networks Using Salphasic Principles

PASCA, A. See more information about PASCA, A. on SCOPUS See more information about PASCA, A. on IEEExplore See more information about PASCA, A. on Web of Science, CIUGUDEAN, M. See more information about CIUGUDEAN, M. on SCOPUS See more information about CIUGUDEAN, M. on SCOPUS See more information about CIUGUDEAN, M. on Web of Science
Click to see author's profile in See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (1,478 KB) | Citation | Downloads: 298 | Views: 1,266

Author keywords
bi-dimensional clock distribution, loss compensation, salphasic, standing wave, zero-skew

References keywords
clock(28), circuits(25), distribution(13), state(12), solid(12), systems(9), swing(7), jssc(7), signal(6), power(6)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2016-02-28
Volume 16, Issue 1, Year 2016, On page(s): 69 - 78
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.01010
Web of Science Accession Number: 000376995400010
SCOPUS ID: 84960100537

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The design of highly efficient clock distributions for integrated circuits is an active topic of research as there will never be a single solution for all systems. For high performance digital or mixed-signal circuits, achieving zero-skew clock over large areas usually comes with high costs in power requirements and design complexity. The present paper shows an overview of a recently proposed technique for ICs - on-die salphasic clock distribution, introduced by the author for CMOS processes. Initially reported in literature for rack-systems, the present paper shows that further refinements are needed for the concept to be applicable on a silicon die. Based on the formation of a standing wave (intrinsically presenting extended in-phase regions) with a voltage peak at the input (creating a no-load condition), it is shown that any IC implementation must use transmission lines loss compensation techniques to maintain the proper standing wave configuration. Furthermore, the paper shows theoretical solutions and describes practical on-die techniques for pseudo-spherical bidimensional surfaces, which, with the already reported orthogonal and pseudo-orthogonal structures, can be used to distribute with minimal power requirements a zero-skew clock signal, over large silicon areas.

References | Cited By  «-- Click to see who has cited this paper

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References Weight

Web of Science® Citations for all references: 982 TCR
SCOPUS® Citations for all references: 0

Web of Science® Average Citations per reference: 25 ACR
SCOPUS® Average Citations per reference: 0

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2019-06-17 07:27 in 205 seconds.

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