|1/2015 - 5|
An Evolutionary Approach to the Soft Error Mitigation Technique for Cell-Based DesignPARK, J. K. , KIM, J. T.
|Click to see author's profile in SCOPUS, IEEE Xplore, Web of Science|
|Download PDF (789 KB) | Citation | Downloads: 310 | Views: 1,606|
soft error mitigation, single event transient, cell-based design, cell sizing, hybrid genetic algorithm
soft(16), error(13), systems(8), design(8), analysis(8), rate(7), designs(7), circuits(6), logic(5), level(5)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2015-02-28
Volume 15, Issue 1, Year 2015, On page(s): 33 - 40
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2015.01005
Web of Science Accession Number: 000352158600005
SCOPUS ID: 84924812869
In this paper, we present a soft error mitigation algorithm that searches for the proper gate sizes within constrained gate-level designs. The individual gate sizing has an impact on the former optimization results and degrades the quality of the solution. In order to address this inefficiency, we utilize a modified topological sort that preserves the preceding local optima. Using a new local searcher, a hybrid genetic optimization technique for soft error mitigation is proposed. This evolutionary search algorithm has general genetic operators: the initialization of the population, crossover, mutation and selection operators. The local searcher consists of two subsequent heuristics. These search algorithms make the individual chromosome move to better search regions in a short time and then, the population acquires various candidates for the global optimum with the help of other genetic operators. The experiments show that the proposed genetic algorithm achieves an approximately 90% reduction in the number of soft errors when compared to the conventional greedy approach with at most 30% overhead for the area and critical path delay.
|References|||||Cited By «-- Click to see who has cited this paper|
| J. L. Leray, "Effects of atmospheric neutrons on devices, at sea level and in avionics embedded systems," Microelectronics Reliability, vol.47, pp. 1827-1835, 2007. |
[CrossRef] [Web of Science Times Cited 23] [SCOPUS Times Cited 31]
 R. C. Baumann, "Soft Errors in Commercial Integrated Circuits," Int. J. of High Speed Electronics and Systems. vol. 14, no.2, pp. 299-309, 2004.
[CrossRef] [SCOPUS Times Cited 17]
 E. Normand, "Single Event Effects in Avionics and On The Ground," Int. J. of High Speed Electronics and Systems. vol. 14, no. 2, pp. 285-298, 2004.
[CrossRef] [SCOPUS Times Cited 6]
 P. Shivakumar, M. Kistler, S. W. Keckler, D. Burger and L. Alvisi, "Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic," Proc. of Int. Conf. on Dependable Systems and Networks, pp. 389-398, 2002.
[CrossRef] [Web of Science Times Cited 664] [SCOPUS Times Cited 1050]
 M. Zhang and N. R. Shanbhag, "Soft-Error-Rate-Analysis (SERA) Methodology," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 2140-2155, 2006.
[CrossRef] [Web of Science Times Cited 68] [SCOPUS Times Cited 91]
 R. R. Rao, K. Chopra, and D. T. Blaauw, "Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 3, pp. 468-479, 2007.
[CrossRef] [Web of Science Times Cited 57] [SCOPUS Times Cited 75]
 J. K. Park, H. S. Choi and J. T. Kim, "A Soft Error Analysis Tool for High-Speed Digital Designs," Proc. of 2nd Int. conf. on Ubiquitous Information Management and Communication, pp. 280-282, 2008.
[CrossRef] [SCOPUS Times Cited 4]
 S. Kwon, J. K. Park and J. T. Kim, "An approximated soft error analysis technique for gate-level designs," IEICE Electronics Express, vol. 11, no. 10, pp. 1-7, 2014.
[CrossRef] [Web of Science Record] [SCOPUS Times Cited 1]
 H-K. Peng, C. H-P. Wen and B. Jayanta, "On soft error rate analysis of scaled CMOS designs: a statistical perspective," Proc. of IEEE/ACM Intl Conf. on Computer-Aided Design, pp. 157-163, 2009.
 Y-H. Kuo, H-K. Peng and C. H-P. Wen, "Accurate statistical soft error rate (SSER) analysis using a quasi-Monte Carlo framework with quality cell models." Proc. of 11th Intl symposium on Quality Electronic Design (ISQED), pp. 831-838, 2010.
[CrossRef] [SCOPUS Times Cited 21]
 A. C-C. Chang, R. H-M. Huang and C. H-P. Wen, "CASSER: A Closed-Form Analysis Framework for Statistical Soft Error Rate," IEEE Trans. on Very Large Scale Integration, vol. 21, no. 10, pp. 1837-1848, 2013.
[CrossRef] [Web of Science Times Cited 13] [SCOPUS Times Cited 16]
 N. M. Zivanov and D. Marculescu, "MARS-C: Modeling and Reduction of Soft Errors in Combinational Circuits," Proc. of Design Automation Conference, pp. 767-772, 2006.
[CrossRef] [Web of Science Times Cited 50]
 Q. Zhou and K. Mohanram, "Cost-Effective Radiation Hardening Technique for Combinational Logic," Proc. of Int. conf. on Computer Aided Design, pp. 100-106, 2004.
[CrossRef] [Web of Science Times Cited 18]
 H. Asadi and M. Tahoori, "Soft error hardening for logic-level designs," Proc. of IEEE Symp. on In Circuits and Systems, 2006.
 Y. S. Dhillon, A. U. Diril, A. Chatterjee, and A. D. Singh, "Analysis and Optimization of Nanometer CMOS Circuits for Soft-Error Tolerance," IEEE Trans. on Very Large Scale Integration Systems, vol. 14, no. 5, pp. 514-524, 2006.
[CrossRef] [Web of Science Times Cited 48] [SCOPUS Times Cited 65]
 J. K. Park and J. T. Kim, "A soft error mitigation technique for constrained gate-level designs," IEICE Electronics Express, vol. 5, no. 18, pp. 698-704, 2008.
[CrossRef] [Web of Science Times Cited 7] [SCOPUS Times Cited 8]
 J. K. Park and J. T. Kim, "A Cell Sizing Technique for Mitigating Logic Soft Errors in Gate-level Designs," Advances In Electrical and Computer Engineering J., vol. 13, no. 4, pp. 13-18, 2013.
[CrossRef] [Full Text] [Web of Science Times Cited 12] [SCOPUS Times Cited 1]
 M. Gen and R. Cheng, "Genetic Algorithms and Engineering Optimization", pp.1-39, John Wiley & Sons, 2000.
 M. Gen and R. Cheng, "Genetic Algorithms and Engineering Design", pp. 31-33, John Wiley & Sons, 1997.
 J. F. Ziegler, "Terrestrial cosmic rays," IBM J., vol. 40, no. 1, pp. 19-39, 1996.
[CrossRef] [Web of Science Times Cited 235] [SCOPUS Times Cited 366]
 P. Hazucha, and C. Svensson, "Impact of CMOS technology scaling on the atmospheric neutron soft error rate," IEEE Trans. on Nuclear Science, vol. 47, no. 6, pp. 2586-2594, 2000.
[CrossRef] [Web of Science Times Cited 282] [SCOPUS Times Cited 368]
 B. Zhang, W. Wang, and M. Orshansky, "FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs," Proc. of 7th Int. Symp. on Quality Electronic Design, pp. 755-760, 2006.
[CrossRef] [SCOPUS Times Cited 130]
Web of Science® Citations for all references: 1,477 TCR
SCOPUS® Citations for all references: 2,250 TCR
Web of Science® Average Citations per reference: 64 ACR
SCOPUS® Average Citations per reference: 98 ACR
TCR = Total Citations for References / ACR = Average Citations per Reference
We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more
Citations for references updated on 2018-09-20 09:34 in 139 seconds.
Note1: Web of Science® is a registered trademark of Clarivate Analytics.
Note2: SCOPUS® is a registered trademark of Elsevier B.V.
Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.