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Hamming Weight Counters and Comparators based on Embedded DSP Blocks for Implementation in FPGASKLYAROV, V. , SKLIAROVA, I.
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hamming weight counter, hamming weight comparator, field-programmable gate array, digital signal processing slice, hardware accelerator, on-chip architecture
link(10), hamming(6), circuits(6), systems(5), skliarova(5), sklyarov(4), parallel(4), fpga(4), digital(4)
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About this article
Date of Publication: 2014-05-31
Volume 14, Issue 2, Year 2014, On page(s): 63 - 68
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.02011
Web of Science Accession Number: 000340868100011
SCOPUS ID: 84901843912
This paper is dedicated to the design, implementation and evaluation of fast FPGA-based circuits that compute Hamming weights for binary vectors and compare the results with fixed thresholds and variable bounds. It is shown that digital signal processing (DSP) slices that are widely available in contemporary FPGAs may be used efficiently and they frequently provide the fastest and least resource consuming solutions. A thorough analysis and comparison of these with the best known alternatives both in hardware and in software is presented. The results are supported by numerous experiments in recent prototyping boards. A fully synthesizable hardware description language (VHDL) specification for one of the proposed core components is given that is ready to be synthesized, implemented, tested and compared in any FPGA that contains embedded DSP48E1 slices (or alternatively DSP48A1 slices from previous generations). Finally, the results of comparisons are provided that include discussions of designs in an ARM processor combined with reconfigurable logic for very long vectors.
|References|||||Cited By «-- Click to see who has cited this paper|
| B. Parhami, "Efficient Hamming weight comparators for binary vectors based on accumulative and up/down parallel counters," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 56, no. 2, 2009, pp. 167-171. |
[CrossRef] [Web of Science Times Cited 23] [SCOPUS Times Cited 27]
 V. Pedroni, "Compact Hamming-comparator-based rank order filter for digital VLSI and FPGA implementations," in Proc. IEEE Int. Symp. on Circuits and Systems, vol. 2, Canada, 2004, pp. 585-588.
 K. Chen, "Bit-serial realizations of a class of nonlinear filters based on positive Boolean functions," IEEE Transactions on Circuits and Systems, vol. 36, no. 6, 1989, pp. 785-794.
[CrossRef] [Web of Science Times Cited 64] [SCOPUS Times Cited 70]
 P. D. Wendt, E. J. Coyle, and N.C. Gallagher, "Stack filters," IEEE Transactions on Acoustics, Speech and Signal Processing, vol. 34, no. 4, 1986, pp. 898-908.
[CrossRef] [SCOPUS Times Cited 405]
 M. Storace and T. Poggi, "Digital architectures realizing piecewise-linear multivariate functions: two FPGA implementations," Int. Journal of Circuit Theory and Applications, vol. 39, no. 1, 2011, pp. 1-15.
[CrossRef] [SCOPUS Times Cited 40]
 K. Asada, S. Kumatsu, and M. Ikeda, "Associative memory with minimum Hamming distance detector and its application to bus data encoding," in Proc. IEEE Asia-Pacific Application-Specific Integrated Circuits Conf., Korea, 1999, pp. 16-18.
 C. Barral, J. S. Coron, and D. Naccache, "Externalized fingerprint matching," in Proc. Int. Conf. on Biometric Authentication, Hong Kong, 2004, pp. 309-315.
 A. Zakrevskij, Y. Pottosin, and L. Cheremisiniva, Combinatorial Algorithms of Discrete Mathematics, TUT Press, 2008.
 I. Skliarova and A. B. Ferrari, "A Software/reconfigurable hardware SAT solver," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 12, no. 4, 2004, pp. 408-419.
[CrossRef] [Web of Science Times Cited 34] [SCOPUS Times Cited 42]
 D. E. Knuth, The Art of Computer Programming, vol. 3: Sorting and Searching, Addison-Wesley, 2011.
 V. Sklyarov and I. Skliarova, "Digital Hamming weight and distance analyzers for binary vectors and matrices," Int. Journal of Innovative Computing, Information and Control, vol. 9, no. 12, 2013, pp. 4825-4849.
 J. D. Davis, Z. Tan, F. Yu, and L. Zhang, "A practical reconfigurable hardware accelerator for Boolean satisfiability solvers," in Proc. 45th ACM/IEEE Design Automation Conf., USA, 2008, pp. 780-785.
 D. Cullina, A.A. Kulkarni, and N. Kiyavash, "A coloring approach to constructing deletion correcting codes from constant weight subgraphs," in Proc. of IEEE Int. Symp. on Information Theory, UK, 2012.
[CrossRef] [SCOPUS Times Cited 12]
 Intel, Corp., Intel® SSE4 Programming Reference, 2007. [Online] Available: Temporary on-line reference link removed - see the PDF document
 ARM, Ltd., NEON Version: 1.0 Programmers Guide, 2013. [Online] Available: Temporary on-line reference link removed - see the PDF document
 Dalke Scientific Software, LLC, Faster population counts, 2011. [Online] Available: Temporary on-line reference link removed - see the PDF document
 R. Ramanarayanan, S. Mathew, V. Erraguntla, R. Krishnamurthy, and S. Gueron, "A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm," in Proc. 21st Int. Conf. on VLSI Design, India, 2008.
 L. Field, T. Barnie, J. Blundy, R.A. Brooker, D. Keir, E. Lewi, and K. Saunders, "Integrated field, satellite and petrological observations of the November 2010 eruption of Erta Ale," Bulletin of Volcanology, vol. 74, no. 10, 2012, pp. 2251-2271.
 V. Sklyarov and I. Skliarova, "Fast Regular Circuits for Network-based Parallel Data Processing," Advances in Electrical and Computer Engineering, vol. 13, no. 4, 2013, pp. 47-50.
[CrossRef] [Full Text] [Web of Science Times Cited 10] [SCOPUS Times Cited 10]
 Digilent, Inc., Nexys4 FPGA board reference manual, 2013. [Online] Available: Temporary on-line reference link removed - see the PDF document
 Xilinx, Inc., 7 Series DSP48E1 Slice User Guide, 2013. [Online] Available: Temporary on-line reference link removed - see the PDF document
 V. Sklyarov and I. Skliarova, "Design and implementation of counting networks," Computing, 2013.
[CrossRef] [SCOPUS Times Cited 12]
 V. Sklyarov and I. Skliarova, Parallel Processing in FPGA-based Digital Circuits and Systems, TUT Press, 2013.
 S. J. Piestrak, "Efficient Hamming weight comparators of binary vectors," Electronic Letters, vol. 43, no. 11, 2007, pp. 611-612.
 V. A. Pedroni, "Compact fixed-threshold and two-vector Hamming comparators," Electronic Letters, vol. 39, no. 24, 2003, pp. 1705-1706.
 R. Mueller, J. Teubner, and G. Alonso, "Sorting Networks on FPGAs," The Int. Journal on Very Large Data Bases, vol. 21, no. 1, 2012, pp. 1-23.
 Avnet, Inc., ZedBoard (Zynq Evaluation and Development) Hardware Users Guide, 2013. [Online] Available: Temporary on-line reference link removed - see the PDF document
 Digilent, Inc., ZyBo Reference Manual, 2014. [Online] Available: Temporary on-line reference link removed - see the PDF document
 M. Sadri, C. Weis, N. Wehn, and L. Benini, "Energy and Performance Exploration of Accelerator Coherency Port Using Xilinx ZYNQ," in Proc. 10th FPGAworld Conf., Copenhagen and Stockholm, 2013.
 Digilent, Inc., PmodKYPD Reference Manual, 2011. [Online] Available: Temporary on-line reference link removed - see the PDF document
 S. E. Anderson, Counting bits set, in parallel. [Online] Available: Temporary on-line reference link removed - see the PDF document
 Xilinx, Inc., OS and Libraries Document Collection, 2010. [Online] Available: Temporary on-line reference link removed - see the PDF document
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