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Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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 HIGH-IMPACT PAPER 

Implementation of High Speed Tangent Sigmoid Transfer Function Approximations for Artificial Neural Network Applications on FPGA

KOYUNCU, I. See more information about KOYUNCU, I. on SCOPUS See more information about KOYUNCU, I. on IEEExplore See more information about KOYUNCU, I. on Web of Science
 
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Download PDF pdficon (1,589 KB) | Citation | Downloads: 676 | Views: 1,551

Author keywords
real-time systems, field programmable gate arrays, artificial neural networks, approximation methods, transfer functions

References keywords
neural(15), fpga(9), chaotic(9), artificial(9), network(7), networks(6), implementation(6), hardware(4), computing(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2018-08-31
Volume 18, Issue 3, Year 2018, On page(s): 79 - 86
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2018.03011
Web of Science Accession Number: 000442420900011
SCOPUS ID: 85052056771

Abstract
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Tangent Sigmoid (TanSig) Transfer Function (TSTF) is one of the nonlinear functions used in Artificial Neural Networks (ANNs). As TSTF includes exponential function operations, hardware-based implementation of this function is difficult. Thus, various methods have been proposed in the literature for the hardware implementation of TSTF. In this study, four different TSTF approaches on FPGA have been implemented using 32-bit IEEE 7541985 floating point number standard, and their performance analyses and FPGA chip statistics are presented. The Van der Pol system ANN application was carried out using four different FPGA-based TSTF units presented. The Multilayer feed-forward neural network structure was used in the study. The FPGA chip statistics and sensitivity analyses were carried out by applying each TSTF structure to the exemplary ANN. The maximum operating frequency of ANNs designed on FPGA using the four different TSTF units varied between 184362 MHz. The CORDIC-LUT-based ANN on FPGA was able to calculate 1 billion results in 3.284 s. According to the Van der Pol system ANN application carried out on FPGA, the CORDIC-LUT-based approach most closely reflected the reference ANN results. This study has a reference and key research for real-time artificial neural network applications used of tangent sigmoid one of the nonlinear transfer functions.


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Cited-By CrossRef

[1] Implementation of Dormand-Prince based chaotic oscillator designs in different IQ-Math number standards on FPGA, KOYUNCU, İsmail, ŞEKER, Halil İbrahim, Sakarya University Journal of Science, ISSN 1301-4048, 2019.
Digital Object Identifier: 10.16984/saufenbilder.505497
[CrossRef]

[2] Hyperjerk multiscroll oscillators with megastability: Analysis, FPGA implementation and a novel ANN-ring-based True Random Number Generator, Tuna, Murat, Karthikeyan, Anitha, Rajagopal, Karthikeyan, Alcin, Murat, Koyuncu, İsmail, AEU - International Journal of Electronics and Communications, ISSN 1434-8411, Issue , 2019.
Digital Object Identifier: 10.1016/j.aeue.2019.152941
[CrossRef]

[3] Design and implementation of hydrogen economy using artificial neural network on field programmable gate array, Koyuncu, Ismail, Yilmaz, Ceyhun, Alcin, Murat, Tuna, Murat, International Journal of Hydrogen Energy, ISSN 0360-3199, Issue 41, Volume 45, 2020.
Digital Object Identifier: 10.1016/j.ijhydene.2020.05.181
[CrossRef]

[4] Thermoeconomic modeling and artificial neural network optimization of Afyon geothermal power plant, Yilmaz, Ceyhun, Koyuncu, Ismail, Renewable Energy, ISSN 0960-1481, Issue , 2021.
Digital Object Identifier: 10.1016/j.renene.2020.09.024
[CrossRef]

[5] A novel secure chaos-based pseudo random number generator based on ANN-based chaotic and ring oscillator: design and its FPGA implementation, Tuna, Murat, Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, Issue 2, Volume 105, 2020.
Digital Object Identifier: 10.1007/s10470-020-01703-z
[CrossRef]

[6] A novel high speed Artificial Neural Network-based chaotic True Random Number Generator on Field Programmable Gate Array, Alcin, Murat, Koyuncu, Ismail, Tuna, Murat, Varan, Metin, Pehlivan, Ihsan, International Journal of Circuit Theory and Applications, ISSN 0098-9886, Issue 3, Volume 47, 2019.
Digital Object Identifier: 10.1002/cta.2581
[CrossRef]

[7] Artificial Neural Networks based thermodynamic and economic analysis of a hydrogen production system assisted by geothermal energy on Field Programmable Gate Array, Yilmaz, Ceyhun, Koyuncu, Ismail, Alcin, Murat, Tuna, Murat, International Journal of Hydrogen Energy, ISSN 0360-3199, Issue 33, Volume 44, 2019.
Digital Object Identifier: 10.1016/j.ijhydene.2019.05.049
[CrossRef]

[8] Dynamical analysis, sliding mode synchronization of a fractional-order memristor Hopfield neural network with parameter uncertainties and its non-fractional-order FPGA implementation, Rajagopal, Karthikeyan, Tuna, Murat, Karthikeyan, Anitha, Koyuncu, İsmail, Duraisamy, Prakash, Akgul, Akif, The European Physical Journal Special Topics, ISSN 1951-6355, Issue 10, Volume 228, 2019.
Digital Object Identifier: 10.1140/epjst/e2019-900005-8
[CrossRef]

[9] Improving the Results of the Earned Value Management Technique Using Artificial Neural Networks in Construction Projects, Balali, Amirhossein, Valipour, Alireza, Antucheviciene, Jurgita, Šaparauskas, Jonas, Symmetry, ISSN 2073-8994, Issue 10, Volume 12, 2020.
Digital Object Identifier: 10.3390/sym12101745
[CrossRef]

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