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JCR Impact Factor: 0.800
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Issues per year: 4
Current issue: Feb 2024
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PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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2023-Jun-28
Clarivate Analytics published the InCites Journal Citations Report for 2022. The InCites JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.800 (0.700 without Journal self-cites), and the InCites JCR 5-Year Impact Factor is 1.000.

2023-Jun-05
SCOPUS published the CiteScore for 2022, computed by using an improved methodology, counting the citations received in 2019-2022 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2022 is 2.0. For "General Computer Science" we rank #134/233 and for "Electrical and Electronic Engineering" we rank #478/738.

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SCOPUS published the CiteScore for 2021, computed by using an improved methodology, counting the citations received in 2018-2021 and dividing the sum by the number of papers published in the same time frame. The CiteScore of Advances in Electrical and Computer Engineering for 2021 is 2.5, the same as for 2020 but better than all our previous results.

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  1/2002 - 16
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Simulation of Switch Box Routing in FPGA

Marius CERLINCA, Adrian GRAUR, Stefan Gheorghe PENTIUC
 
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Not available online | Views: 1,253

Author keywords
integrated circuits, Field-Programmable Gate Arrays, routing, simulation, switch box

References keywords
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About this article
Date of Publication: 2002-04-02
Volume 2, Issue 1, Year 2002, On page(s): 86 -
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: Not assigned

Abstract
Quick view
Field-Programmable Gate Arrays (FPGAs) are integrated circuits, which can be programmed to implement virtually any digital circuit. This programmability provides a low-risk, low-turnaround time option for implementing digital circuits. This programmability comes at a cost, however. Typically, circuits implemented on FPGAs are three times slower and have only one tenth the density of circuits implemented using more conventional techniques. Much of this area and speed penalty is due to the programmable routing structures contained in the FPGA. By optimizing these routing structures, significant performance and density improvements are possible. A routing program for simulating how routing is influenced by switch box design was made.


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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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