|3/2015 - 21|
Genetic Synthesis of New Reversible/Quantum Ternary ComparatorDEIBUK, V. , BILOSHYTSKYI, A.
|Click to see author's profile on SCOPUS, IEEE Xplore, Web of Science|
|Download PDF (1,130 KB) | Citation | Downloads: 191 | Views: 1,046|
genetic algorithms, multivalued logic, ternary comparators, reversible logic, quantum computing
quantum(22), logic(16), sible(12), circuits(11), multiple(9), ternary(8), khan(7), evolutionary(7), soft(6), genetic(6)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2015-08-31
Volume 15, Issue 3, Year 2015, On page(s): 147 - 152
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2015.03021
Web of Science Accession Number: 000360171500021
SCOPUS ID: 84940762198
Methods of quantum/reversible logic synthesis are based on the use of the binary nature of quantum computing. However, multiple-valued logic is a promising choice for future quantum computer technology due to a number of advantages over binary circuits. In this paper we have developed a synthesis of ternary reversible circuits based on Muthukrishnan-Stroud gates using a genetic algorithm. The method of coding chromosome is presented, and well-grounded choice of algorithm parameters allowed obtaining better circuit schemes of one- and n-qutrit ternary comparators compared with other methods. These parameters are quantum cost of received reversible devices, delay time and number of constant input (ancilla) lines. Proposed implementation of the genetic algorithm has led to reducing of the device delay time and the number of ancilla qutrits to 1 and 2n-1 for one- and n-qutrits full comparators, respectively. For designing of n-qutrit comparator we have introduced a complementary device which compares output functions of 1-qutrit comparators.
Web of Science® Times Cited: 3 [View]
View record in Web of Science® [View]
View Related Records® [View]
SCOPUS® Times Cited: 4
View record in SCOPUS® [Free preview]
 Towards quantum reversible ternary coded decimal adder, Haghparast, Majid, Wille, Robert, Monfared, Asma Taheri, Quantum Information Processing, ISSN 1570-0755, Issue 11, Volume 16, 2017.
Digital Object Identifier: 10.1007/s11128-017-1735-3 [CrossRef]
 Ternary reversible/quantum latches, Hu, Zhengbing, Yuriychuk, Ivan, Deibuk, Vitaly, 2017 IEEE First Ukraine Conference on Electrical and Computer Engineering (UKRCON), ISBN 978-1-5090-3006-4, 2017.
Digital Object Identifier: 10.1109/UKRCON.2017.8100380 [CrossRef]
 New design of reversible/quantum devices for ternary arithmetic, Hu, Zhengbing, Deibuk, Vitaly, 2016 IEEE First International Conference on Data Stream Mining & Processing (DSMP), ISBN 978-1-5090-3736-0, 2016.
Digital Object Identifier: 10.1109/DSMP.2016.7583512 [CrossRef]
 Optimized design of the universal ternary gates for quantum/reversible computing, Deibuk, Vitaly, Turchenko, Iryna, Shults, Vladyslav, 2015 IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), ISBN 978-1-4673-8359-2, 2015.
Digital Object Identifier: 10.1109/IDAACS.2015.7341452 [CrossRef]
Disclaimer: All information displayed above was retrieved by using remote connections to respective databases. For the best user experience, we update all data by using background processes, and use caches in order to reduce the load on the servers we retrieve the information from. As we have no control on the availability of the database servers and sometimes the Internet connectivity may be affected, we do not guarantee the information is correct or complete. For the most accurate data, please always consult the database sites directly. Some external links require authentication or an institutional subscription.
Web of Science® is a registered trademark of Clarivate Analytics, Scopus® is a registered trademark of Elsevier B.V., other product names, company names, brand names, trademarks and logos are the property of their respective owners.
Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
All rights reserved: Advances in Electrical and Computer Engineering is a registered trademark of the Stefan cel Mare University of Suceava. No part of this publication may be reproduced, stored in a retrieval system, photocopied, recorded or archived, without the written permission from the Editor. When authors submit their papers for publication, they agree that the copyright for their article be transferred to the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania, if and only if the articles are accepted for publication. The copyright covers the exclusive rights to reproduce and distribute the article, including reprints and translations.
Permission for other use: The copyright owner's consent does not extend to copying for general distribution, for promotion, for creating new works, or for resale. Specific written permission must be obtained from the Editor for such copying. Direct linking to files hosted on this website is strictly prohibited.
Disclaimer: Whilst every effort is made by the publishers and editorial board to see that no inaccurate or misleading data, opinions or statements appear in this journal, they wish to make it clear that all information and opinions formulated in the articles, as well as linguistic accuracy, are the sole responsibility of the author.