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Controller Architecture Design for MMC-HVDCZHANG, B. , ZHAO, C. , GUO, C. , XIAO, X. , ZHOU, L.
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physical simulation system, modular multilevel converter, pole controller & protection system, valve based controller, sub-module controller, steady-state test platform
power(18), hvdc(11), multilevel(9), modular(9), converter(7), yang(6), voltage(6), energy(6), electronics(6), system(5)
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About this article
Date of Publication: 2014-05-31
Volume 14, Issue 2, Year 2014, On page(s): 9 - 16
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.02002
Web of Science Accession Number: 000340868100002
SCOPUS ID: 84901832748
Compared with high voltage direct current (HVDC), the primary and secondary systems of modular multilevel converter based HVDC (MMC-HVDC) are complicated. And the characteristics of the control system determine the properties of the MMC-HVDC system to a certain extent. This paper investigates the design of control architecture. First, the structure and parameters of the 21-level MMC-HVDC are designed. Second, the framework of the control system is studied in details and a complete control system is established. The communication mode and content are built between each layer, and the control system program is developed and debugged. Then The steady state test platform of the sub-module and the relevant control system are designed. Finally, the steady-state tests and the system test of the physical MMC-HVDC simulation system are conducted, which prove that the SMC can control the sub-module (SM) efficiently, and the control system could realize efficient start and stop of the physical system. Meanwhile, the capacitor voltage balance between the sub-modules and the basic fault protection and control of the DC voltage and power are verified to be effective.
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 New Boost-Type PFC MF-Vienna PWM Rectifiers with Multiplied Switching Frequency, FLORICAU, D., TUDORACHE, T., KREINDLER, L., Advances in Electrical and Computer Engineering, ISSN 1582-7445, Issue 4, Volume 15, 2015.
Digital Object Identifier: 10.4316/AECE.2015.04011 [CrossRef] [Full text]
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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