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An Area Efficient Composed CORDIC ArchitectureAGUIRRE-RAMOS, F. , MORALES-REYES, A. , CUMPLIDO, R. , FEREGRINO-URIBE, C.
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digital systems, computer architecture, field programmable gate arrays, signal processing, circuit optimization
cordic(15), systems(10), circuits(5), architecture(5), algorithm(5), parallel(4), adaptive(4)
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About this article
Date of Publication: 2014-05-31
Volume 14, Issue 2, Year 2014, On page(s): 113 - 116
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.02019
Web of Science Accession Number: 000340868100019
SCOPUS ID: 84901821988
This article presents a composed architecture for the CORDIC algorithm. CORDIC is a widely used technique to calculate basic trigonometric functions using only additions and shifts. This composed architecture combines an initial coarse stage to approximate sine and cosine functions, and a second stage to finely tune those values while CORDIC operates on rotation mode. Both stages contribute to shorten the algorithmic steps required to fully execute the CORDIC algorithm. For comparison purposes, the Xilinx CORDIC logiCORE IP and previously reported research are used. The proposed architecture aims at reducing hardware resources usage as its key objective.
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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