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Pipelined Error-detecting Codes in FPGA TestingBREKHOV, O. , RATNIKOV, M.
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field programmable gate arrays, design for testability, automatic testing, cyclic redundancy check codes, error correction codes
fpga(13), testing(9), test(7), fpgas(6), fault(6), diagnosis(6), technology(5), design(5), systems(4), science(4)
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About this article
Date of Publication: 2014-05-31
Volume 14, Issue 2, Year 2014, On page(s): 57 - 62
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.02010
Web of Science Accession Number: 000340868100010
SCOPUS ID: 84901841977
This article approaches the solution of FPGA testing and research of characteristics at early development stages. The approach offers error-detection code based on universal test firmware. The performed test firmware based on CRC and Hamming codes detect single and multiple faults, and locate fault place (for Hamming code based test firmware).
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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