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Immunity Characterization of FPGA I/Os for Fault-Tolerant Circuit Designs against EMINGUYEN, V. T. , DAM, M. T. , SO, J. , LEE, J.-G.
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immunity, susceptibility, integrated circuit, electromagnetic compatibility, electromagnetic interference
circuits(10), integrated(9), power(8), immunity(7), electromagnetic(7), temc(6), susceptibility(6), electro(6), compat(6), modeling(4)
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About this article
Date of Publication: 2019-05-31
Volume 19, Issue 2, Year 2019, On page(s): 37 - 44
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2019.02005
Web of Science Accession Number: 000475806300005
SCOPUS ID: 85066298408
This paper characterizes the immunity of I/Os under different supply voltages for fault-tolerant circuit designs against electromagnetic interference. The direct power injection approach is used as a means to characterize the immunity of circuits. In this work, the immunity characterization has been performed under two scenarios: (1) an input buffer of a Field Programmable Gate Array (FPGA) followed by a single flip-flop, and (2) the FPGA input buffer followed by a redundancy-based fault-tolerant circuit. The experimental results show that when downscaling the supply voltage through a set of nominal values (i.e., 3.3, 2.5, 1.8, 1.5, 1.2 V), the immunity of I/Os is decreased from the highest level at 3.3 V to the lowest at 1.2 V. Particularly, the maximum difference in the immunity is about 16.8 dB at the frequency of 600 MHz. Moreover, experiments demonstrate that I/O buffers followed by the redundancy-based fault-tolerant circuit can improve the immunity of the circuit up to 4 dB below the frequency band of 400 MHz. Thus, the redundancy-based fault-tolerant circuit can support I/Os to operate reliably in the harsh environment.
|References|||||Cited By «-- Click to see who has cited this paper|
| Fr. Fiori, "Susceptibility of smart power ICs to radio frequency interference," IEEE Trans. Power Electron., vol. 29, no. 6, pp. 2787-2797, Jun. 2014. |
[CrossRef] [Web of Science Times Cited 5] [SCOPUS Times Cited 5]
 A. Alaeldine, R. Perdriau, M. Ramdani, J.-L. Levant, and M. Drissi, "A Direct power injection model for immunity prediction in integrated circuits," IEEE Trans. Electromagn. Compat., vol. 50, no. 1, pp. 52-62, Feb. 2008.
[CrossRef] [Web of Science Times Cited 42] [SCOPUS Times Cited 56]
 T. Su, M. Unger, Th. Steinecke, and R. Weigel, "Using error-source switching (ESS) concept to analyze the conducted radio frequency electromagnetic immunity of microcontrollers," IEEE Trans. Electromagn. Compat., Vol. 54, No. 3, pp. 634-645, Jun. 2012.
[CrossRef] [Web of Science Times Cited 7] [SCOPUS Times Cited 11]
 M. Ramdani et al., "The Electromagnetic compatibility of integrated circuits-Past, Present, and Future," IEEE Trans. Electromagn. Compat., vol. 51, no. 1, pp. 78-100, 2009.
[CrossRef] [Web of Science Times Cited 162] [SCOPUS Times Cited 212]
 J. Wu et al., "Modeling and simulation of LDO voltage regulator susceptibility to conducted EMI," IEEE Trans. Electromagn. Compat., vol. 56, no. 3, pp. 726-735, Jun. 2014.
[CrossRef] [Web of Science Times Cited 14] [SCOPUS Times Cited 23]
 A. Ayed, Tr. Dubois, J.-L. Levant, and G. Duchamp, "A New method for the characterization of electronic components immunity," IEEE Trans. Instrum. Meas., vol. 64, no. 9, pp. 2496-2503, Sept. 2015.
[CrossRef] [Web of Science Times Cited 3] [SCOPUS Times Cited 4]
 M. Fontana, F. Canavero, and R. Perraud, "Integrated circuit modeling for noise susceptibility prediction in communication networks," IEEE Trans. Electromagn. Compat., vol. 57, no. 3, pp. 339-348, 2015.
[CrossRef] [Web of Science Times Cited 8] [SCOPUS Times Cited 8]
 R. Henderson, D. McMasters, D. French, and T. Clarke, "Direct power injection of microcontrollers in PCB environments," in Proc. of 2012 International Conference on Electromagnetics in Advanced Applications, Cape Town, 2012, pp. 1149-1151.
[CrossRef] [SCOPUS Times Cited 2]
 Ph. Schroter, Fr. Klotz, and M. Pamato, "RF immunity investigations of linear DC current regulators," in Proc. of the 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, Edinburgh, 2015, pp. 119-124.
[CrossRef] [SCOPUS Times Cited 1]
 Zh. Wang, Ch. Zhou, T. Liu, Sh. Zhao, and Zh. Liang, "Nonlinear behavior immunity modeling of an LDO voltage regulator under conducted EMI," IEEE Trans. Electromagn. Compat., vol. 58, no. 4, pp. 1016-1024, Aug. 2016.
[CrossRef] [Web of Science Times Cited 2] [SCOPUS Times Cited 5]
 A. Lavarda, D. Amschl, S. Bauer, B. Deutschmann, "Characterization of the immunity of integrated circuits (ICs) at wafer level," in Proc. the 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, Edinburgh, 2015, pp. 196-201.
[CrossRef] [SCOPUS Times Cited 2]
 T. Sawada, K. Yoshikawa, H. Takata, K. Nii, and M. Nagata, "An extended direct power injection method for in-place susceptibility characterization of VLSI circuits against electromagnetic interference," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 23, no. 10, pp. 2347-2351, Oct. 2015.
[CrossRef] [Web of Science Times Cited 2] [SCOPUS Times Cited 4]
 K. Taniguchi et al., "Susceptibility evaluation of CAN transceiver circuits with in-place waveform capturing under RF DPI," in Proc. 11th International workshop on the Electromagnetic Compatibility of Integrated Circuits, 2017, pp. 59-63.
[CrossRef] [SCOPUS Times Cited 4]
 S. Dhia, A. Boyer, B. Vrignon, M. Deobarro, and T. V. Dinh, "On-Chip noise sensor for integrated circuit susceptibility investigations," IEEE Trans. Instrum. Meas., vol. 61, no. 3, pp. 696-707, 2012.
[CrossRef] [Web of Science Times Cited 18] [SCOPUS Times Cited 28]
 IEC 62132-4, Integrated circuits - measurement of electromagnetic immunity, 150 KHz to 1 GHz - part 4: direct RF power injection method, February, 2006. https://webstore.iec.ch/publication/6510
 L. Atias, A. Teman, and A. Fish, "Single event upset mitigation in low power SRAM design," in Proc. IEEE 28th Convention of Electrical and Electronics Engineers in Israel, Eilat, 2014, pp. 1-5.
[CrossRef] [SCOPUS Times Cited 4]
 David G. Mavis and Paul H. Eaton, "SEU and SET modeling and mitigation in deep submicron technologies," 45th Annual International Reliability Physics Symposium, Phoenix, 2007, pp. 293-305.
[CrossRef] [Web of Science Times Cited 60] [SCOPUS Times Cited 86]
 S. Kumar, S. Chellappa, and L. T. Clark, "Temporal pulse-clocked multi-bit flip-flop mitigating SET and SEU," in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 814-817.
[CrossRef] [SCOPUS Times Cited 6]
 MACOM Division of AMP Inc., RF directional couplers and 3 dB hybrids, Application Note M560, Ver.2.00.
 Agilent, 8648C Synthesized RF Signal Generator, 9 kHz to 3200 MHz.
 Ophirrf, Linear Power RF Amplifier, model 5124.
 Xilinx Inc., Spartan-3 FPGA Family Datasheet, June, 2013, pp. 63-65.
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