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JCR Impact Factor: 0.595
JCR 5-Year IF: 0.661
Issues per year: 4
Current issue: Nov 2017
Next issue: Feb 2018
Avg review time: 105 days


PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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ABC Algorithm based Fuzzy Modeling of Optical Glucose Detection, SARACOGLU, O. G., BAGIS, A., KONAR, M., TABARU, T. E.
Issue 3/2016

AbstractPlus






LATEST NEWS

2017-Jun-14
Thomson Reuters published the Journal Citations Report for 2016. The JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.595, and the JCR 5-Year Impact Factor is 0.661.

2017-Apr-04
We have the confirmation Advances in Electrical and Computer Engineering will be included in the EBSCO database.

2017-Feb-16
With new technologies, such as mobile communications, internet of things, and wide applications of social media, organizations generate a huge volume of data, much faster than several years ago. Big data, characterized by high volume, diversity and velocity, increasingly drives decision making and is changing the landscape of business intelligence, from governments to private organizations, from communities to individuals. Big data analytics that discover insights from evidences has a high demand for computing efficiency, knowledge discovery, problem solving, and event prediction. We dedicate a special section of Issue 4/2017 to Big Data. Prospective authors are asked to make the submissions for this section no later than the 31st of May 2017, placing "BigData - " before the paper title in OpenConf.

2017-Jan-30
We have the confirmation Advances in Electrical and Computer Engineering will be included in the Gale database.

2016-Dec-17
IoT is a new emerging technology domain which will be used to connect all objects through the Internet for remote sensing and control. IoT uses a combination of WSN (Wireless Sensor Network), M2M (Machine to Machine), robotics, wireless networking, Internet technologies, and Smart Devices. We dedicate a special section of Issue 2/2017 to IoT. Prospective authors are asked to make the submissions for this section no later than the 31st of March 2017, placing "IoT - " before the paper title in OpenConf.

Read More »


    
 

  2/2016 - 8

A Framework for Hardware-Accelerated Services Using Partially Reconfigurable SoCs

MACHIDON, O. M. See more information about MACHIDON, O. M. on SCOPUS See more information about MACHIDON, O. M. on IEEExplore See more information about MACHIDON, O. M. on Web of Science, HINTEA, S. See more information about  HINTEA, S. on SCOPUS See more information about  HINTEA, S. on SCOPUS See more information about HINTEA, S. on Web of Science, SANDU, F. See more information about SANDU, F. on SCOPUS See more information about SANDU, F. on SCOPUS See more information about SANDU, F. on Web of Science
 
Click to see author's profile on See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (1,404 KB) | Citation | Downloads: 207 | Views: 675

Author keywords
System-on-Chip, reconfigurable architectures, web services, reconfigurable logic

References keywords
services(11), systems(8), fpga(7), xilinx(6), design(6), hardware(5), embedded(5), security(4), jose(4), corp(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2016-05-31
Volume 16, Issue 2, Year 2016, On page(s): 57 - 62
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.02008
Web of Science Accession Number: 000376996100008
SCOPUS ID: 84974855069

Abstract
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Full text preview
The current trend towards Everything as a Service fosters a new approach on reconfigurable hardware resources. This innovative, service-oriented approach has the potential of bringing a series of benefits for both reconfigurable and distributed computing fields by favoring a hardware-based acceleration of web services and increasing service performance. This paper proposes a framework for accelerating web services by offloading the compute-intensive tasks to reconfigurable System-on-Chip (SoC) devices, as integrated IP (Intellectual Property) cores. The framework provides a scalable, dynamic management of the tasks and hardware processing cores, based on dynamic partial reconfiguration of the SoC. We have enhanced security of the entire system by making use of the built-in detection features of the hardware device and also by implementing active counter-measures that protect the sensitive data.


References | Cited By  «-- Click to see who has cited this paper

[1] A. Hayek, S. Domes, J. Borcsok. "Internet-controlled dynamic reconfiguration for FPGA-based embedded systems", in Proc. of 3rd Int. Conf. on Communications and Information Technology (ICCIT), Jun.19-21, 2013, Beirut, LB, pp.190-194.
[CrossRef] [SCOPUS Times Cited 3]


[2] K. Mershad, A.R. Kaitoua, H. Artail, M.A.R. Saghir, H. Hajj, "A framework for multi-cloud cooperation with hardware reconfiguration support", in Proc. of IEEE 9th World Congress on Services (SERVICES), June 28-July 3, 2013, Santa Clara, CA, pp.52-59.
[CrossRef] [SCOPUS Times Cited 2]


[3] S. Pedre, T. Krajnik, E. Todorovich, P. Borensztejn, "A co-design methodology for processor-centric embedded systems with hardware acceleration using FPGA", in Proc. 8th Southern Conf. on Programmable Logic (SPL), Mar.20-23, 2012, Bento Goncalves, BR, pp.1-8.
[CrossRef] [SCOPUS Times Cited 8]


[4] T. Huffmire, B. Brotherton, T. Sherwood, R. Kastner, T. Levin, T.D. Nguyen, C. Irvine, "Managing Security in FPGA-Based Embedded Systems", in IEEE Journal on Design & Test of Computers, vol.25, no.6, Nov.-Dec.2008, pp.590-598,
[CrossRef] [Web of Science Times Cited 12] [SCOPUS Times Cited 21]


[5] W. Chao, L. Xi, Z. Junneng, C. Peng, Z. Xuehai, "CaaS: Core as a service realizing hardware services on reconfigurable MPSoCS", in Proc. 22nd Int. Conf. on Field Programmable Logic and Applications (FPL), Aug.29-31, 2012, Oslo, NO, pp.495-498.
[CrossRef] [SCOPUS Times Cited 3]


[6] A. Cilardo, L. Coppolino, A. Mazzeo, L. Romano, "Combining programmable hardware and web services technologies for delivering high-performance and interoperable security", in Proc. 15th Int. Conf. on Parallel, Distributed and Network-Based Processing (PDP'07), Feb.7-9, 2007, Napoli, IT, pp.381-386,
[CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 1]


[7] J. Mao, Q. Xu, Z. Sun, X. Lu, "FSArch: Enables FPGA-Based platforms to provide network services", in Proc. 4th World Congress on Software Engineering (WCSE), Dec.3-4, 2013, Hong Kong, CN, pp.241-245.
[CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 1]


[8] D. Rodriguez, J.M. Sanchez, A. Duran. "Distributed reconfigurable computing using XML Web services", in Proc. IEEE Workshop on Signal Processing Systems Design and Implementation, Nov.2-4, 2005, Athens, GR, pp.613-617.
[CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 3]


[9] A. Melnyk, V. Melnyk, "Self-Configurable FPGA-Based Computer Systems," Advances in Electrical and Computer Engineering, vol.13, no.2, pp.33-38, 2013,
[CrossRef] [Full Text] [Web of Science Times Cited 3] [SCOPUS Times Cited 5]


[10] B. Perry, Java Servlet & JSP Cookbook, pp. 119-120, Sebastopol, CA: O'Reilly, 2004.

[11] D. Chappell, T. Jewell, Java Web Services, pp. 39-45, Sebastopol, CA: O'Reilly, 2002.

[12] A. Sarangi, S. MacMahon, U. Cherukupaly, "LightWeight IP application examples", Application Note XAPP1026 v5.1, Xilinx Corp., San Jose, CA, 2014.

[13] M. Schramm, A. Grzemba, "Reconfigurable trust for embedded computing platforms", in Proc. IEEE Int.Conf. on Applied Electronics (AE), Sep.5-7, 2012, Pilsen, CZ, pp.261-264.

[14] S. McNeil, "Solving today's design security concerns", White Paper WP365, Xilinx Corp., San Jose, CA, 2012.

[15] J. D. Corbett, "The Xilinx Isolation design flow for fault-tolerant systems", White Paper WP412, Xilinx Corp., San Jose, CA, 2012.

[16] S. M. Trimberger, J. J. Moore, "FPGA Security: Motivations, features and applications", Proceedings of the IEEE, vol.102, no.8, pp.1248-1265, 2014.
[CrossRef] [Web of Science Times Cited 22] [SCOPUS Times Cited 29]


[17] R. Pellizzoni, M. Caccamo. "Real-Time Management of Hardware and Software Tasks for FPGA-based Embedded Systems", in IEEE Trans. Computers, vol.56, no.12, pp.1666-1680, 2007.
[CrossRef] [Web of Science Times Cited 14] [SCOPUS Times Cited 26]


[18] D. Dye, "Partial reconfiguration of Xilinx FPGAs using ISE Design Suite", White Paper WP374, Xilinx Corp., San Jose, CA, 2012.

[19] Z. Zheng, Y. Zhang, M.R Lyu, "Investigating QoS of Real-World Web Services", in IEEE Trans. Services Computing, vol.7, no.1, pp.32-39, 2014.
[CrossRef] [Web of Science Times Cited 60] [SCOPUS Times Cited 79]


[20] D. McKee, D. Webster, J. Xu, "Enabling Decision Support for the Delivery of Real-Time Services", in Proc. of 16th IEEE Int. Symposium on High Assurance Systems Engineering (HASE), Jan.8-10, 2015, Daytona Beach, FL, pp.60-67.
[CrossRef] [Web of Science Times Cited 1] [SCOPUS Times Cited 4]




References Weight

Web of Science® Citations for all references: 115 TCR
SCOPUS® Citations for all references: 185 TCR

Web of Science® Average Citations per reference: 5 ACR
SCOPUS® Average Citations per reference: 9 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2017-12-16 07:19 in 91 seconds.




Note1: Web of Science® is a registered trademark of Thomson Reuters.
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Disclaimer: All queries to the respective databases were made by using the DOI record of every reference (where available). Due to technical problems beyond our control, the information is not always accurate. Please use the CrossRef link to visit the respective publisher site.

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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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