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A Framework for Hardware-Accelerated Services Using Partially Reconfigurable SoCsMACHIDON, O. M. , HINTEA, S. , SANDU, F.
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System-on-Chip, reconfigurable architectures, web services, reconfigurable logic
services(11), systems(8), fpga(7), xilinx(6), design(6), hardware(5), embedded(5), security(4), jose(4), corp(4)
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About this article
Date of Publication: 2016-05-31
Volume 16, Issue 2, Year 2016, On page(s): 57 - 62
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2016.02008
Web of Science Accession Number: 000376996100008
SCOPUS ID: 84974855069
The current trend towards Everything as a Service fosters a new approach on reconfigurable hardware resources. This innovative, service-oriented approach has the potential of bringing a series of benefits for both reconfigurable and distributed computing fields by favoring a hardware-based acceleration of web services and increasing service performance. This paper proposes a framework for accelerating web services by offloading the compute-intensive tasks to reconfigurable System-on-Chip (SoC) devices, as integrated IP (Intellectual Property) cores. The framework provides a scalable, dynamic management of the tasks and hardware processing cores, based on dynamic partial reconfiguration of the SoC. We have enhanced security of the entire system by making use of the built-in detection features of the hardware device and also by implementing active counter-measures that protect the sensitive data.
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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania
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