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JCR Impact Factor: 0.699
JCR 5-Year IF: 0.674
Issues per year: 4
Current issue: Nov 2018
Next issue: Feb 2019
Avg review time: 82 days


PUBLISHER

Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229
ROMANIA

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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LATEST NEWS

2018-Jun-27
Clarivate Analytics published the InCites Journal Citations Report for 2017. The JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.699, and the JCR 5-Year Impact Factor is 0.674.

2017-Jun-14
Thomson Reuters published the Journal Citations Report for 2016. The JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.595, and the JCR 5-Year Impact Factor is 0.661.

2017-Feb-16
With new technologies, such as mobile communications, internet of things, and wide applications of social media, organizations generate a huge volume of data, much faster than several years ago. Big data, characterized by high volume, diversity and velocity, increasingly drives decision making and is changing the landscape of business intelligence, from governments to private organizations, from communities to individuals. Big data analytics that discover insights from evidences has a high demand for computing efficiency, knowledge discovery, problem solving, and event prediction. We dedicate a special section of Issue 4/2017 to Big Data. Prospective authors are asked to make the submissions for this section no later than the 31st of May 2017, placing "BigData - " before the paper title in OpenConf.

Read More »


    
 

  2/2014 - 19

An Area Efficient Composed CORDIC Architecture

AGUIRRE-RAMOS, F. See more information about AGUIRRE-RAMOS, F. on SCOPUS See more information about AGUIRRE-RAMOS, F. on IEEExplore See more information about AGUIRRE-RAMOS, F. on Web of Science, MORALES-REYES, A. See more information about  MORALES-REYES, A. on SCOPUS See more information about  MORALES-REYES, A. on SCOPUS See more information about MORALES-REYES, A. on Web of Science, CUMPLIDO, R. See more information about  CUMPLIDO, R. on SCOPUS See more information about  CUMPLIDO, R. on SCOPUS See more information about CUMPLIDO, R. on Web of Science, FEREGRINO-URIBE, C. See more information about FEREGRINO-URIBE, C. on SCOPUS See more information about FEREGRINO-URIBE, C. on SCOPUS See more information about FEREGRINO-URIBE, C. on Web of Science
 
Click to see author's profile in See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (691 KB) | Citation | Downloads: 275 | Views: 93

Author keywords
digital systems, computer architecture, field programmable gate arrays, signal processing, circuit optimization

References keywords
cordic(15), systems(10), circuits(5), architecture(5), algorithm(5), parallel(4), adaptive(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2014-05-31
Volume 14, Issue 2, Year 2014, On page(s): 113 - 116
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2014.02019
Web of Science Accession Number: 000340868100019
SCOPUS ID: 84901821988

Abstract
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Full text preview
This article presents a composed architecture for the CORDIC algorithm. CORDIC is a widely used technique to calculate basic trigonometric functions using only additions and shifts. This composed architecture combines an initial coarse stage to approximate sine and cosine functions, and a second stage to finely tune those values while CORDIC operates on rotation mode. Both stages contribute to shorten the algorithmic steps required to fully execute the CORDIC algorithm. For comparison purposes, the Xilinx CORDIC logiCORE IP and previously reported research are used. The proposed architecture aims at reducing hardware resources usage as its key objective.


References | Cited By  «-- Click to see who has cited this paper

[1] J. E. Volder, "The CORDIC Trigonometric Computing Technique," IEEE Transactions on Electronic Computers, vol. EC-8, no. 3, pp. 330-334, Sep. 1959.
[CrossRef] [SCOPUS Times Cited 1524]


[2] J.S. Walther, "A unified algorithm for elementary functions", in Proc. AFIPS Conf., vol. 38, 1971, pp. 385-389.
[CrossRef]


[3] C.-C. Sun, P. Donner, and J. Götze, "VLSI implementation of a configurable IP Core for quantized discrete cosine and integer transforms," International Journal of Circuit Theory and Applications, vol. 40, no. 11, pp. 1107-1126, Nov. 2012.
[CrossRef] [Web of Science Times Cited 10] [SCOPUS Times Cited 14]


[4] J.-H. Lee, T.-H. Cheng, and H.-C. Chen, "Design of IIR linear-phase nonuniform-division filter banks with signed powers-of-two coefficients," International Journal of Circuit Theory and Applications, vol. 37, no. 7, pp. 811-834, Sep. 2009.
[CrossRef] [Web of Science Times Cited 7] [SCOPUS Times Cited 7]


[5] M. Abo-Zahhad and M. F. Fahmy, "Synthesis of low-sensitivity orthogonal digital filters," International Journal of Circuit Theory and Applications, vol. 25, no. 6, pp. 503-520, Nov. 1997.
[CrossRef]


[6] Maharatna, K., Banerjee, S., Grass, E., Krstic, M., & Troya, A. (2005). Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture. IEEE Transcations on Circuits and Systems Video Technology, 11(11), 1463-1474.
[CrossRef] [Web of Science Times Cited 52] [SCOPUS Times Cited 74]


[7] B. Lakshmi and a. S. Dhar, "VLSI architecture for low latency radix-4 CORDIC," Computers & Electrical Engineering, vol. 37, no. 6, pp. 1032-1042, Nov. 2011.
[CrossRef] [Web of Science Times Cited 52] [SCOPUS Times Cited 74]


[8] T. K. Rodrigues and E. E. Swartzlander Jr., "Adaptive CORDIC: Using Parallel Angle Recoding to Accelerate Rotations," IEEE Transactions on Computers, vol. 59, no. 4, pp. 522-531, Apr. 2010.
[CrossRef] [Web of Science Times Cited 20] [SCOPUS Times Cited 25]


[9] J.-A. Lee and T. Lang, "Constant-factor redundant CORDIC for angle calculation and rotation," Computers, IEEE Transactions on, vol. 41, no. 8, pp. 1016-1025, 1992.
[CrossRef] [Web of Science Times Cited 51] [SCOPUS Times Cited 55]


[10] K. Maharatna, S. Banerjee, E. Grass, M. Krstic, and A. Troya, "Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture," IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 11, pp. 1463-1474, Nov. 2005.
[CrossRef] [Web of Science Times Cited 52] [SCOPUS Times Cited 74]


[11] T. Juang, "Low Latency Angle Recoding Methods for the Higher Bit-Width Parallel CORDIC Rotator Implementations," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 55, no. 11, pp. 1139-1143, Nov. 2008.
[CrossRef] [Web of Science Times Cited 9] [SCOPUS Times Cited 12]


[12] T.-B. Juang, S.-F. Hsiao, and M.-Y. Tsai, "Para-CORDIC: Parallel CORDIC Rotation Algorithm," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, no. 8, pp. 1515-1524, Aug. 2004.
[CrossRef] [Web of Science Times Cited 39] [SCOPUS Times Cited 60]


[13] S. Aggarwal and K. Khare, "Leading One Detection Hyperbolic CORDIC with Enhanced Range of Convergence," Journal of Signal Processing Systems, Feb. 2012.
[CrossRef] [Web of Science Record] [SCOPUS Times Cited 1]


[14] D.-M. Ross, S. Miller, M. Sima, and M. McGuire, "Exploration of sign precomputation-based CORDIC in reconfigurable systems," in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR), 2011, pp. 2186-2191.
[CrossRef] [SCOPUS Times Cited 1]


[15] M. Kuhlmann and K. K. Parhi, "P-CORDIC?: A Precomputation Based Rotation," EURASIP Journal on Applied Signal Processing, vol. 2002, no. 1, pp. 936-943, 2002.
[CrossRef] [Web of Science Times Cited 19] [SCOPUS Times Cited 28]


[16] B. Gisuthan, "Flat CORDIC: a unified architecture for high-speed generation of trigonometric and hyperbolic functions," in Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems, 2000, 2000, pp. 1414-1417.
[CrossRef]


[17] M. S. Sinith and K. Jismi, "A comparison of pipelined parallel and iterative CORDIC design on FPGA," in 2010 5th International Conference on Industrial and Information Systems, 2010, no. i, pp. 239-243.
[CrossRef] [SCOPUS Times Cited 7]


[18] Xilinx Inc., "LogiCORE IP CORDIC v4.0. Product Specification, DS249," 2011.

[19] J. Xu, T. Arslan, D. Wan, and Q. Wang, "GPS attitude determination using a genetic algorithm," in Evolutionary Computation, Proceedings of the 2002 Congress on, 2002, vol. 1, pp. 998-1002.
[CrossRef] [SCOPUS Times Cited 24]


[20] E. F. Stefatos and T. Arslan, "High-performance adaptive GPS attitude determination VLSI architecture," in Signal Processing Systems, 2004. SIPS 2004. IEEE Workshop on, 2004, pp. 233-238.
[CrossRef]




References Weight

Web of Science® Citations for all references: 311 TCR
SCOPUS® Citations for all references: 1,980 TCR

Web of Science® Average Citations per reference: 15 ACR
SCOPUS® Average Citations per reference: 94 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2018-12-18 14:21 in 136 seconds.




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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania


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