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Threads Pipelining on the CellBE SystemsTANASE, C. A. , GAITAN, V. G.
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Cell B.E., threads, PPU-SPU pipeline communication, flip-flop buffer, three level pipeline transfer
parallel(13), cell(11), processing(5), engine(5), broadband(5), parallelism(4), computing(4)
Blue keywords are present in both the references section and the paper title.
About this article
Date of Publication: 2013-08-31
Volume 13, Issue 3, Year 2013, On page(s): 121 - 126
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2013.03019
Web of Science Accession Number: 000326321600019
SCOPUS ID: 84884919716
This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
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