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JCR Impact Factor: 0.595
JCR 5-Year IF: 0.661
Issues per year: 4
Current issue: Feb 2018
Next issue: May 2018
Avg review time: 108 days


Stefan cel Mare
University of Suceava
Faculty of Electrical Engineering and
Computer Science
13, Universitatii Street
Suceava - 720229

Print ISSN: 1582-7445
Online ISSN: 1844-7600
WorldCat: 643243560
doi: 10.4316/AECE


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Thomson Reuters published the Journal Citations Report for 2016. The JCR Impact Factor of Advances in Electrical and Computer Engineering is 0.595, and the JCR 5-Year Impact Factor is 0.661.

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  3/2009 - 8

Robust and Low-Complexity Timing Synchronization Algorithm and its Architecture for ADSRC Applications

KIM, J. See more information about KIM, J. on SCOPUS See more information about KIM, J. on IEEExplore See more information about KIM, J. on Web of Science, TRONG ANH, H. See more information about TRONG ANH, H. on SCOPUS See more information about TRONG ANH, H. on SCOPUS See more information about TRONG ANH, H. on Web of Science
Click to see author's profile on See more information about the author on SCOPUS SCOPUS, See more information about the author on IEEE Xplore IEEE Xplore, See more information about the author on Web of Science Web of Science

Download PDF pdficon (547 KB) | Citation | Downloads: 805 | Views: 3,607

Author keywords
advanced dedicated short range communication, cross-correlation method, field programmable gate array, orthogonal frequency division multiplexing, timing synchronization

References keywords
ofdm(9), synchronization(6), timing(5), communications(5), electronics(4)
Blue keywords are present in both the references section and the paper title.

About this article
Date of Publication: 2009-10-26
Volume 9, Issue 3, Year 2009, On page(s): 39 - 44
ISSN: 1582-7445, e-ISSN: 1844-7600
Digital Object Identifier: 10.4316/AECE.2009.03008
Web of Science Accession Number: 000271872000008
SCOPUS ID: 77954752385

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5.9 GHz advanced dedicated short range communications (ADSRC) is a short-to-medium range communication standard that supports both public safety and private operations in roadside-to-vehicle and vehicle-to-vehicle communication environments. The core technology of physical layer in ADSRC is orthogonal frequency division multiplexing (OFDM), which is sensitive to timing synchronization error. In this paper, a robust and low-complexity timing synchronization algorithm suitable for ADSRC system and its efficient hardware architecture are proposed. The implementation of the proposed architecture is performed with Xilinx Vertex-II XC2V1000 Field Programmable Gate Array (FPGA). The proposed algorithm is based on cross-correlation technique, which is employed to detect the starting point of short training symbol and the guard interval of the long training symbol. Synchronization error rate (SER) evaluation results and post-layout simulation results show that the proposed algorithm is efficient in high-mobility environments. The post-layout results of implementation demonstrate the robustness and low-complexity of the proposed architecture.

References | Cited By  «-- Click to see who has cited this paper

[1] Home/Standards Programs/North American/DSRC_Tutorial_06-10-021/sld091.htm

[2] L. Hanzo, M. Munster, B.J Choi and T. Keller, "OFDM and MC-CDMA for Broadband Multi-User Communications", WLANs and Broadcasting, Wiley, 2003 [PermaLink]

[3] Shinsuke Hara, Ramjee Prasad, "Muticarrier Technologies for 4G Mobile Communications", Artech, 2003

[4] Joint Technical Committee on Wireless Access, "Technical Report on RF channel characterization and System Deployment Modeling", Paper No. JTC(AIR) 1994.09.23-065R6, Sep. 23, 1994

[5] T. M. Schmidl and D. C. Cox, "Robust frequency and timing synchronization for OFDM", IEEE Transaction on Communications, vol. 45, pp.1613-1621, Dec. 1997
[CrossRef] [Web of Science Times Cited 1727] [SCOPUS Times Cited 2428]

[6] J.J. van de Beek, M. Sandell, "ML Estimation of Time and Frequency Offset in OFDM Systems", IEEE Transactions on Signal Processing, vol.45, pp.1800-1805, July 1997
[CrossRef] [Web of Science Times Cited 1182] [SCOPUS Times Cited 1661]

[7] S. Chang and B. Kelley, "Time synchronization for OFDM-based WLAN systems", IEEE Electronics Letters, vol. 39, pp. 1024-1026, June 2003

[8] N. Chan, M Tanaka and R.Heaton, "OFDM Timing Synchronization under Multi-path Channels", VTC-2003 Spring, vol. 1, pp. 378-382, May 2003

[9] Feng Lu, Takm Ohseki, Hiroyasu Ishikawa and Hideyuki Shinonaga, "On Symbol Timing for OFDM based Mobile Communications Systems", Global Telecommunications Conference, vol. 1, pp. 273-277, Nov. 2002

[10] Kun-Wah Yip, Yik-Chung Wu and Tung-Sang Ng, "Timing-synchronization analysis for IEEE 802.11a wireless LANs in frequency-nonselective Rician fading environments", IEEE transactions on Wirelss Communications, vol. 3, pp. 387-394, March 2004
[CrossRef] [Web of Science Times Cited 20] [SCOPUS Times Cited 29]

[11] C. Williams, M.A. Beach and S. McLaughlin, Robust "OFDM timing synchronization", IEEE Electronics Letters, vol. 41, pp. 751-752, June 2005

[12] K.Wang, J. Singh and M. Faulkner, "FPGA implementation of OFDM-WLAN synchronizer", Electronics Design, Test and Applications, 2004 EEE Electronics Letters, pp. 89-94, Jan 2004
[CrossRef] [SCOPUS Times Cited 10]

[13] Yin-Tsung Hwang, Kuo-Wei Liao and Chien-Hsin Wu, "FPGA realization of an OFDM frame synchronization design for dispersive channels", ISCAS'03, vol. 2, pp. 256-259, May 2003

References Weight

Web of Science® Citations for all references: 2,929 TCR
SCOPUS® Citations for all references: 4,128 TCR

Web of Science® Average Citations per reference: 209 ACR
SCOPUS® Average Citations per reference: 295 ACR

TCR = Total Citations for References / ACR = Average Citations per Reference

We introduced in 2010 - for the first time in scientific publishing, the term "References Weight", as a quantitative indication of the quality ... Read more

Citations for references updated on 2018-03-16 14:31 in 41 seconds.

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Faculty of Electrical Engineering and Computer Science
Stefan cel Mare University of Suceava, Romania

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